/*
 * $QNXLicenseC:
 * Copyright 2007, QNX Software Systems. All Rights Reserved.
 * 
 * You must obtain a written license from and pay applicable license fees to QNX 
 * Software Systems before you may reproduce, modify or distribute this software, 
 * or any work that includes all or part of this software.   Free development 
 * licenses are available for evaluation and non-commercial purposes.  For more 
 * information visit http://licensing.qnx.com or email licensing@qnx.com.
 *  
 * This file may contain contributions from others.  Please review this entire 
 * file for other proprietary rights or license notices, as well as the QNX 
 * Development Suite License Guide at http://licensing.qnx.com/license-guide/ 
 * for other information.
 * $
 */

#include <ppc/cpu.h>
#include <ppc/403cpu.h>
#include <ppc/405cpu.h>
#include <ppc/603cpu.h>
#include <ppc/700cpu.h>
#include <ppc/800cpu.h>
#include <ppc/440cpu.h>
#include <ppc/e500cpu.h>

VALUE(FLTNOFPU,         FLTNOFPU);
VALUE(FLTMACHCHK,       FLTMACHCHK);
VALUE(FLTBUSERR,		FLTBUSERR);
VALUE(FLTBUSTIMOUT,		FLTBUSTIMOUT);

VALUE(PPCINT,			sizeof(ppcint));

COMMENT("object PPC_CPU_REGISTERS");
VALUE( REG_SIZE        , sizeof(PPC_CPU_REGISTERS) );
VALUE( REG_GPR         , offsetof(PPC_CPU_REGISTERS, gpr[0]) );
VALUE( REG_CTR         , offsetof(PPC_CPU_REGISTERS, ctr) );
VALUE( REG_LR          , offsetof(PPC_CPU_REGISTERS, lr) );
VALUE( REG_FPR         , offsetof(PPC_FPU_REGISTERS, fpr[0]) );
VALUE( REG_IAR         , offsetof(PPC_CPU_REGISTERS, iar) );
VALUE( REG_CR          , offsetof(PPC_CPU_REGISTERS, cr) );
VALUE( REG_XER         , offsetof(PPC_CPU_REGISTERS, xer) );
VALUE( REG_EAR         , offsetof(PPC_CPU_REGISTERS, ear) );
VALUE( REG_FPSCR       , offsetof(PPC_FPU_REGISTERS, fpscr) );
VALUE( REG_MSR         , offsetof(PPC_CPU_REGISTERS, msr) );
VALUE( REG_MSR_U       , offsetof(PPC_CPU_REGISTERS, u.msr_u) );
VALUE( REG_VMX         , offsetof(PPC_VMX_REGISTERS, vmxr[0]) );
VALUE( REG_VSCR        , offsetof(PPC_VMX_REGISTERS, vscr) );
VALUE( REG_VRSAVE      , offsetof(PPC_CPU_REGISTERS, u2.vrsave) );
VALUE( REG_SPEFSCR     , offsetof(PPC_CPU_REGISTERS, u2.spefscr) );
VALUE( REG_USPRG0      , offsetof(PPC_CPU_REGISTERS, u.usprg0) );

VALUE( CPU_ALT_OFF     , offsetof(THREAD, cpu.alt) );
VALUE( CPU_DBSR_OFF     , offsetof(THREAD, cpu.dbsr) );

COMMENT("SPE save area");
VALUE( REG_SPE_ACC     , offsetof(PPC_SPE_REGISTERS, acc) );
VALUE( REG_SPE_GPR_HI  , offsetof(PPC_SPE_REGISTERS, gpr_hi) );

COMMENT("ppc registers");
VALUE(PPC_CPU_EAR,			PPC_CPU_EAR);
VALUE(PPC_CPU_ALTIVEC,		PPC_CPU_ALTIVEC);
VALUE(PPC_CPU_SPE,			PPC_CPU_SPE);
VALUE(PPC_SPR_DAR,		 	PPC_SPR_DAR);
VALUE(PPC_SPR_TBL,		 	PPC_SPR_TBL);
VALUE(PPC_SPR_IBAT0L, PPC_SPR_IBAT0L);
VALUE(PPC_SPR_IBAT1L, PPC_SPR_IBAT1L);
VALUE(PPC_SPR_IBAT2L, PPC_SPR_IBAT2L);
VALUE(PPC_SPR_IBAT3L, PPC_SPR_IBAT3L);
VALUE(PPC_SPR_DBAT0L, PPC_SPR_DBAT0L);
VALUE(PPC_SPR_DBAT1L, PPC_SPR_DBAT1L);
VALUE(PPC_SPR_DBAT2L, PPC_SPR_DBAT2L);
VALUE(PPC_SPR_DBAT3L, PPC_SPR_DBAT3L);

COMMENT("MSR bits");
VALUE( PPC_MSR_EE,			PPC_MSR_EE );
VALUE( PPC_MSR_FP,			PPC_MSR_FP );
VALUE( PPC_MSR_DE,			PPC_MSR_DE );
VALUE( PPC_MSR_IR,			PPC_MSR_IR );
VALUE( PPC_MSR_IS,			PPC_MSR_IS );
VALUE( PPC_MSR_DR,			PPC_MSR_DR );
VALUE( PPC_MSR_DS,			PPC_MSR_DS );
VALUE( PPC_MSR_RI,			PPC_MSR_RI );
VALUE( PPC_MSR_POW,			PPC_MSR_POW );
VALUE( PPC_MSR_VA,			PPC_MSR_VA );
VALUE( PPC_MSR_SPE,         PPC_MSR_SPE );
VALUE( PPC_MSR_WE,			PPC_MSR_WE );
VALUE( PPC_MSR_SE,			PPC_MSR_SE );
VALUE( PPC_MSR_BE,			PPC_MSR_BE );

VALUE(PPC_SRR1_L1IC, PPC_SRR1_L1IC);
VALUE(PPC_SRR1_L1DC, PPC_SRR1_L1DC);
VALUE(PPC_SRR1_MSS,  PPC_SRR1_MSS);
VALUE(PPC_SRR1_MCP,  PPC_SRR1_MCP);
VALUE(PPC_SRR1_TEA,  PPC_SRR1_TEA);
VALUE(PPC_SRR1_DPE,  PPC_SRR1_DPE);
VALUE(PPC_SRR1_APE,  PPC_SRR1_APE);


VALUE(PPC_SPR_SRR0,			PPC_SPR_SRR0);
VALUE(PPC_SPR_SRR1,			PPC_SPR_SRR1);

VALUE( PPC_SPR_DSISR, 		PPC_SPR_DSISR);
VALUE( PPC_DSISR_STORE,		PPC_DSISR_STORE);
VALUE( PPC_DSISR_NOTRANS,	PPC_DSISR_NOTRANS);

VALUE(PPC400_SPR_ESR,		PPC400_SPR_ESR);
VALUE(PPC400_ESR_DST,		PPC400_ESR_DST);
VALUE(PPC405_ESR_MCI,		PPC405_ESR_MCI);
VALUE(PPC400_SPR_DBSR,		PPC400_SPR_DBSR);

VALUE(PPC400_SPR_DEAR,		PPC400_SPR_DEAR);
VALUE(PPC400_SPR_PID,		PPC400_SPR_PID);

VALUE( PPC_FPSCR_UX,			PPC_FPSCR_UX );
VALUE( PPC_FPSCR_OX,			PPC_FPSCR_OX );
VALUE( PPC_FPSCR_VX,			PPC_FPSCR_VX );
VALUE( PPC_FPSCR_XX,			PPC_FPSCR_XX );
VALUE( PPC_FPSCR_ZX,			PPC_FPSCR_ZX );

VALUE( PPC603_SPR_HID0,	PPC603_SPR_HID0);
VALUE( PPC603_SPR_HID0_DCE,	PPC603_SPR_HID0_DCE);
VALUE( PPC603_SPR_HID0_ICE,	PPC603_SPR_HID0_ICE);

VALUE( PPC700_SPR_HID0,	PPC700_SPR_HID0);
VALUE( PPC700_SPR_HID1,	PPC700_SPR_HID1);
VALUE( PPC700_SPR_PIR,	PPC700_SPR_PIR);
VALUE( PPC700_SPR_HID0_ICE,     PPC700_SPR_HID0_ICE);
VALUE( PPC700_SPR_HID0_ICFI,    PPC700_SPR_HID0_ICFI);
VALUE( PPC700_SPR_MSSSR0,       PPC700_SPR_MSSSR0);
VALUE( PPC700_SPR_L3CR, PPC700_SPR_L3CR);

VALUE( PPC_SPR_DEC, PPC_SPR_DEC);
VALUE( SPR_VRSAVE,	PPC7400_SPR_VRSAVE);

VALUE( PPC403_BESR_DSES,	PPC403_BESR_DSES );

VALUE( PPC403_DCR_BESR,		PPC403_DCR_BESR );
VALUE( PPC403_DCR_BEAR,		PPC403_DCR_BEAR );

VALUE(PPC_EXC_INSTR_ACCESS,	PPC_EXC_INSTR_ACCESS);
VALUE(PPC_EXC_DATA_ACCESS,	PPC_EXC_DATA_ACCESS);
VALUE(PPC400_EXC_ITLB_MISS,	PPC400_EXC_ITLB_MISS);

VALUE(PPC400_EXC_DTLB_MISS,	PPC400_EXC_DTLB_MISS);
VALUE(PPC400_EXC_ITLB_MISS,	PPC400_EXC_ITLB_MISS);

VALUE(PPC800_EXC_ID_ITLB_MISS,	PPC800_EXC_ID_ITLB_MISS);
VALUE(PPC800_EXC_ID_DTLB_MISS,	PPC800_EXC_ID_DTLB_MISS);

VALUE(PPC400_TLBLO_EX,		PPC400_TLBLO_EX);
VALUE(PPC400_TLBLO_WR,		PPC400_TLBLO_WR);
VALUE(PPC400_TLBLO_ZONE_SHIFT,PPC400_TLBLO_ZONE_SHIFT);

VALUE(PPC400_TLBHI_SIZE_4K,	PPC400_TLBHI_SIZE_4K);
VALUE(PPC400_TLBHI_SIZE_16M,PPC400_TLBHI_SIZE_16M);
VALUE(PPC400_TLBHI_VALID,	PPC400_TLBHI_VALID);

VALUE(PPC_CPU_HW_POW,		PPC_CPU_HW_POW); 

VALUE(PPC_KERENTRY_COMMON,	PPC_KERENTRY_COMMON);
VALUE(PPC_KEREXIT_COMMON,	PPC_KEREXIT_COMMON);
VALUE(PPCBKE_RANDOM_BASE,	PPCBKE_RANDOM_BASE);
VALUE(PPCBKE_RANDOM_SIZE,	PPCBKE_RANDOM_SIZE);
VALUE(PPCBKE_RANDOM_SHIFT,	PPCBKE_RANDOM_SHIFT);
VALUE(VM_KERN_LOW_SIZE,		VM_KERN_LOW_SIZE);
VALUE(VM_CPUPAGE_ADDR,		VM_CPUPAGE_ADDR);
VALUE(VM_SYSPAGE_ADDR,		VM_SYSPAGE_ADDR);

VALUE(VM_FAULT_INKERNEL,	VM_FAULT_INKERNEL);
VALUE(VM_FAULT_WRITE,		VM_FAULT_WRITE);
VALUE(VM_FAULT_INSTR,		VM_FAULT_INSTR);
VALUE(VM_FAULT_WIMG_ERR,	VM_FAULT_WIMG_ERR);
VALUE(VM_FAULT_KEREXIT,		VM_FAULT_KEREXIT);

VALUE(LOW_MEM_BOUNDRY,		offsetof(struct thread_entry, cpu.low_mem_boundry));

VALUE(PPC_TLBLO_PP_RO,	PPC_TLBLO_PP_RO);
VALUE(PPC_TLBLO_PP_RW,	PPC_TLBLO_PP_RW);
VALUE(PPC_TLBLO_R,		PPC_TLBLO_R);
VALUE(PPC_TLBLO_C,		PPC_TLBLO_C);
VALUE(PPC_TLBLO_M,		PPC_TLBLO_M);
VALUE(PPC_TLBLO_G,		PPC_TLBLO_G);
VALUE(PPC_TLBLO_I,		PPC_TLBLO_I);

VALUE(PPC603_SPR_IMISS,	PPC603_SPR_IMISS);
VALUE(PPC603_SPR_DMISS,	PPC603_SPR_DMISS);
VALUE(PPC603_SPR_ICMP,	PPC603_SPR_ICMP);
VALUE(PPC603_SPR_DCMP,	PPC603_SPR_DCMP);
VALUE(PPC603_SPR_RPA,	PPC603_SPR_RPA);

VALUE(PPC800_SPR_M_TW,		PPC800_SPR_M_TW);
VALUE(PPC800_SPR_M_TWB,		PPC800_SPR_M_TWB);
VALUE(PPC800_SPR_MD_TWC,	PPC800_SPR_MD_TWC);
VALUE(PPC800_SPR_MD_RPN,	PPC800_SPR_MD_RPN);
VALUE(PPC800_SPR_MD_EPN,	PPC800_SPR_MD_EPN);
VALUE(PPC800_SPR_MI_EPN,	PPC800_SPR_MI_EPN);
VALUE(PPC800_SPR_MI_TWC,	PPC800_SPR_MI_TWC);
VALUE(PPC800_SPR_MI_RPN,	PPC800_SPR_MI_RPN);
VALUE(PPC800_SPR_M_CASID,	PPC800_SPR_M_CASID);
VALUE(PPC800_TWC_PS_8M,		PPC800_TWC_PS_8M);
VALUE(PPC800_TWC_PS_512K,	PPC800_TWC_PS_512K);
VALUE(PPC800_TWC_V,			PPC800_TWC_V);
VALUE(PPC800_RPN_V,			PPC800_RPN_V);
VALUE(PPC800_RPN_SH, 		PPC800_RPN_SH);
VALUE(PPC800_SPR_MD_CTR, 	PPC800_SPR_MD_CTR);
VALUE(PPC800_SPR_MD_AP, 	PPC800_SPR_MD_AP);
VALUE(PPC800_SPR_MI_CTR, 	PPC800_SPR_MI_CTR);
VALUE(PPC800_SPR_MI_AP, 	PPC800_SPR_MI_AP);
VALUE(PPC800_SPR_MI_DBCAM, 	PPC800_SPR_MI_DBCAM);
VALUE(PPC800_SPR_MI_DBRAM0, PPC800_SPR_MI_DBRAM0);
VALUE(PPC800_SPR_MI_DBRAM1, PPC800_SPR_MI_DBRAM1);
VALUE(PPC800_SPR_MD_DBCAM, 	PPC800_SPR_MD_DBCAM);
VALUE(PPC800_SPR_MD_DBRAM0, PPC800_SPR_MD_DBRAM0);
VALUE(PPC800_SPR_MD_DBRAM1, PPC800_SPR_MD_DBRAM1);
VALUE(PPC800_RPN_PP1_SHIFT, PPC800_RPN_PP1_SHIFT);
VALUE(PPC800_RPN_PP2_SHIFT, PPC800_RPN_PP2_SHIFT);
VALUE(PPC800_RPN_LPS,		PPC800_RPN_LPS);
	
VALUE(VM_MSG_XFER_START  , VM_MSG_XFER_START);
VALUE(VM_MSG_XFER_END    , VM_MSG_XFER_END);

VALUE(PPCBKE_SPR_DEAR,		PPCBKE_SPR_DEAR);
VALUE(PPCBKE_SPR_ESR,		PPCBKE_SPR_ESR);
VALUE(PPCBKE_SPR_PID,		PPCBKE_SPR_PID);
VALUE(PPCBKE_SPR_CSRR0,		PPCBKE_SPR_CSRR0);
VALUE(PPCBKE_SPR_CSRR1,		PPCBKE_SPR_CSRR1);
VALUE(PPCBKE_SPR_SPRG4,		PPCBKE_SPR_SPRG4);
VALUE(PPCBKE_SPR_SPRG5,		PPCBKE_SPR_SPRG5);
VALUE(PPCBKE_SPR_SPRG6,		PPCBKE_SPR_SPRG6);
VALUE(PPCBKE_SPR_SPRG7,		PPCBKE_SPR_SPRG7);
VALUE(PPCBKE_SPR_SPRG4RO,	PPCBKE_SPR_SPRG4RO);
VALUE(PPCBKE_SPR_SPRG5RO,	PPCBKE_SPR_SPRG5RO);
VALUE(PPCBKE_SPR_SPRG6RO,	PPCBKE_SPR_SPRG6RO);
VALUE(PPCBKE_SPR_SPRG7RO,	PPCBKE_SPR_SPRG7RO);
VALUE(PPCBKE_SPR_USPRG0,	PPCBKE_SPR_USPRG0);
VALUE(PPCBKE_SPR_DBSR,		PPCBKE_SPR_DBSR);

VALUE(PPCBKE_SPR_L1PAGETABLE_WR,	PPCBKE_SPR_L1PAGETABLE_WR);
VALUE(PPCBKE_SPR_L1PAGETABLE_RD,	PPCBKE_SPR_L1PAGETABLE_RD);

VALUE(PPC440GX_SPR_MCSRR0,	PPC440GX_SPR_MCSRR0);
VALUE(PPC440GX_SPR_MCSRR1,	PPC440GX_SPR_MCSRR1);
VALUE(PPC440_SPR_MMUCR,		PPC440_SPR_MMUCR);
VALUE(PPC440_MMUCR_STS_SHIFT,PPC440_MMUCR_STS_SHIFT);

VALUE(PPC440_ESR_MCI,		PPC440_ESR_MCI);
VALUE(PPCBKE_ESR_ST,		PPCBKE_ESR_ST);

VALUE(PPCBKE_TLB_RPN,		offsetof(ppcbke_tlb_t, rpn));
VALUE(PPCBKE_TLB_EPN,		offsetof(ppcbke_tlb_t, epn));
VALUE(PPCBKE_TLB_TID,		offsetof(ppcbke_tlb_t, tid));
VALUE(PPCBKE_TLB_ATTR,		offsetof(ppcbke_tlb_t, attr));
VALUE(PPCBKE_TLB_ACCESS,	offsetof(ppcbke_tlb_t, access));
VALUE(PPCBKE_TLB_SIZE,		offsetof(ppcbke_tlb_t, size));
VALUE(PPCBKE_TLB_TS,		offsetof(ppcbke_tlb_t, ts));
VALUE(PPCBKE_TLB_V,			offsetof(ppcbke_tlb_t, v));

VALUE(PPCBKE_TLB_SIZE_4K,	PPCBKE_TLB_SIZE_4K);
VALUE(PPCBKE_TLB_SIZE_256M,	PPCBKE_TLB_SIZE_256M);

VALUE(SIZEOF_TLBINFO,		sizeof(struct ppc_tlbinfo_entry));
VALUE(NUM_ENTRIES,			offsetof(struct ppc_tlbinfo_entry, num_entries));

VALUE(PPCE500_SPR_MCSRR0,	PPCE500_SPR_MCSRR0);
VALUE(PPCE500_SPR_MCSRR1,	PPCE500_SPR_MCSRR1);
VALUE(PPCE500_SPR_MCSR,		PPCE500_SPR_MCSR);
VALUE(PPCE500_SPR_MCAR,		PPCE500_SPR_MCAR);
VALUE(PPCE500_SPR_SPEFSCR,	PPCE500_SPR_SPEFSCR);

VALUE(PPCBKEM_SPR_MAS0,		PPCBKEM_SPR_MAS0);
VALUE(PPCBKEM_SPR_MAS1,		PPCBKEM_SPR_MAS1);
VALUE(PPCBKEM_SPR_MAS2,		PPCBKEM_SPR_MAS2);
VALUE(PPCBKEM_SPR_MAS3,		PPCBKEM_SPR_MAS3);
VALUE(PPCBKEM_SPR_MAS6,		PPCBKEM_SPR_MAS6);
VALUE(PPCBKEM_SPR_MAS7,		PPCBKEM_SPR_MAS7);

VALUE(PPC64_SLB0_VSID_SHIFT,	PPC64_SLB0_VSID_SHIFT);
VALUE(PPC64_SLB0_KS,			PPC64_SLB0_KS);
VALUE(PPC64_SLB0_KP,			PPC64_SLB0_KP);
VALUE(PPC64_SLB1_V,				PPC64_SLB1_V);
VALUE(PPC64_SLB1_ESID_SHIFT,	PPC64_SLB1_ESID_SHIFT);

VALUE(PPC64_TLBHI_SW_SHIFT,		PPC64_TLBHI_SW_SHIFT);
VALUE(PPC64_TLBHI_H,			PPC64_TLBHI_H);
VALUE(PPC64_TLBHI_V,			PPC64_TLBHI_V);
VALUE(PPC64_TLBHI_AVPN_SHIFT,	PPC64_TLBHI_AVPN_SHIFT);

/* __SRCVERSION("cpu_asmoff.h $Rev: 204741 $"); */
